1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device and a method for fabricating the same, and more particularly, to an in-plane switching mode LCD device.
2. Background of the Invention
Active matrix LCD devices increasingly are used for flat panel TVs, portable computers, monitors, etc. Among the active matrix LCD devices, twisted nematic (TN) type LCD devices primarily are used. In a TN type LCD device, two electrodes are respectively disposed on two substrates, and a liquid crystal (LC) director is arranged to be twisted by 90°. Then, a voltage is applied to the electrodes to drive the LC director. The TN type LCD device primarily is used because of its excellent contrast and color reproduction. However, the TN type LCD device has a narrow viewing angle.
To solve the viewing angle problems of the TN type LCD device, an IPS (in-plane switching) mode has been developed. According to the IPS mode, two electrodes, a pixel electrode and a common electrode are formed on one substrate, and an LC director is controlled by a horizontal electric field generated between the two electrodes.
The structure of a related LCD device will now be explained with reference to FIG. 1. FIG. 1 is a plane view showing an LCD device in accordance with the related art.
As shown in FIG. 1, a gate line 13 and a data line 20 are formed on a transparent substrate (not shown) of an opaque metal for defining pixels. Here, the gate line 13 and the data line 2D perpendicularly cross each other. At an intersection point between the gate line 13 and the data line 20, a thin film transistor is formed for switching a voltage ON/OFF. The thin film transistor comprises source drain electrodes 21 and 23 with an active region 19 therebetween. The gate line 13 serves as the gate of the thin film transistor.
A plate type common electrode 11 and a pixel electrode 29 formed of a transparent metal are insulated by an insulating layer, and overlap each other in a pixel region. The common electrode 11 and the common line 15 contact each other with the common line 15 parallel to the gate line 13, thereby dividing the pixel region into upper and lower parts.
The pixel electrode 29 is formed of a plate type transparent metal, and is provided with a plurality of slits 29a symmetrical to one another in the upper and lower parts with respect to the common line 15. A fringe field is generated between the common electrode 11 and the pixel electrode 29 having the plurality of slits 29a. A common signal is applied to the common electrode 11, and a pixel voltage having passed through the TFT is applied to the pixel electrode 29. A liquid crystal is driven by the fringe field. That is, when no voltage is applied to the LCD device, initially aligned liquid crystals are rotated by the fringe field, thereby permitting light to pass.
An alignment layer (not shown) is further provided at inner surfaces of upper and lower substrates of the fringe field mode LCD device. The alignment layer on the upper substrate (not shown) and the alignment layer on the lower substrate (not shown) are arranged to have an angle of 90° therebetween as in the TN mode LCD device.
A method for fabricating an LCD device in accordance with the related art will now be explained with reference to FIG. 2. FIG. 2 is a plane view showing an LCD device in accordance with the related art.
As shown in FIG. 2, a transparent conductive material, such as ITO, is deposited on an array substrate 10 and is then patterned, thereby forming a common electrode 11. Then, a metallic material is deposited on the array substrate 10 having the common electrode 11 and is then patterned, thereby forming the gate line 13 and a common line 15 (FIG. 1). Here, the gate line 13 and the common line 15 are formed parallel to each other. Also, a portion of the gate line 13 serves as the gate electrode 13a. 
An insulating material is deposited on an entire surface of the array substrate 10 having the common electrode 11, the gate line 13 and the common line 15, thereby forming a gate insulating layer 17. Next, a semiconductor layer 19 is formed on the gate insulating layer 17.
A conductive material for a data line is deposited on an entire surface of the array substrate 10 having the semiconductor layer 19 and is then patterned, thereby forming data lines 20 (FIG. 1) and source/drain electrodes 21 and 23. An insulating material is deposited on the entire surface of the array substrate 10 including the data lines 20, thereby forming a passivation layer 25.
The passivation layer 25 is selectively patterned to form a contact hole exposing a portion of the drain electrode 23. A transparent conductive material, such as ITO, is deposited on the passivation layer 25 and then is patterned, thereby forming a pixel electrode 29 having a plurality of slits 29a. The pixel electrode 29 is electrically connected to the drain electrode 23 through the contact hole.
An alignment layer (not shown) is formed on the passivation layer 25 having the pixel electrode 29 and is aligned in a desired direction. In the fringe field mode LCD device, an alignment layer on an upper substrate and an alignment layer on a lower substrate are aligned to have an angle of 90° therebetween, but the alignment may be formed in any direction.
However, the related art LCD device has a number of problems. First, the common electrode is disposed below the pixel electrode, and the pixel electrode is disposed on the gate insulating layer and the passivation layer. Accordingly, light leakage is generated by an electric field formed between the source/drain electrodes and the pixel electrode in a black gradation. The light leakage is prevented by a black matrix formed on the color filter substrate. However, an alignment margin between the source/drain electrodes and the black matrix is decreased when the array substrate and the color filter substrate are attached to each other, thereby having a high possibility of a mis-alignment and decreasing the aperture ratio. Further, in the related art LCD device, a silicon nitride (SiNx) is used as the passivation layer. Since the silicon nitride has a high dielectric constant of approximately 6-7, a parasitic capacitance may be generated between the common electrode and the pixel electrode.